Digital Signal Processing (DSP) chips are used for handheld devices, and power consumption is the core parameter.Due to the high reliability of ROM, this DSP uses it to store the curing bootloader, scientific function library, functional function library and main application program, and its power consumption has a great impact on the whole chip.In order to solve the problem of high power consumption caused by frequent access of ROM in the chip, a low power optimization method is put forward to optimize the structure of ROM storage space, optimize the address recombination of ROM storage space and optimize the timing sequence structure of read data, so as to reduce the power consumption without affecting the performance of DSP.This DSP has been streamed and revised to reduce the total power consumption of DSP by about 11.3%.