FPGA+SRIO+VPX架构的多路高速互连信息处理系统实现
DOI:
作者:
作者单位:

作者简介:

通讯作者:

基金项目:


Implementation of Multichannel Highspeed Interconnect Information Processing System Based on FPGA+SRIO+VPX Architecture
Author:
Affiliation:

Fund Project:

  • 摘要
  • |
  • 图/表
  • |
  • 访问统计
  • |
  • 参考文献
  • |
  • 相似文献
  • |
  • 引证文献
  • |
  • 资源附件
    摘要:

    针对国防、军工等领域对数据带宽、传输速率、通道数量和数据运算处理速度等要求不断提高的现状,设计了高集成度的复合架构的多路高速互连信息处理系统;该系统利用多片FPGA的GHT高速接口用于接口连接与信息处理,采用SRIO交换技术用于板内外高速互连,通过VPX接口与系统组成数据传输网络,以实现数据传输和处理的高效结合;还进行了系统软件架构试,表明该系统在6U尺寸内实现了板间96路10 Gbps高速数据信号接收、56路10 Gbps高速数据信号发送、12路10 Gbps高速数据光信号发送,板内32路10 Gbps高速数据信号互连;系统10 Gbps多路数据传输通路能满足军工级苛刻环境应用要求,其多路10 Gbps数据传输能力在国内军工模块电路中处于国内领先、国际先进水平。

    Abstract:

    Aiming at the current situation of the increasing of data bandwidth, transmission rate, number of channels and data processing speed in the fields of national defense and military industry, a multichannel highspeed interconnect information processing system with highly integrated composite architecture is designed.The system utilizes multichip FPGA GHT highspeed interface for interface connection and information processing, SRIO switching technology for highspeed interconnection inside and outside the board, and VPX interface and system to form a data transmission network to achieve efficient combination of data transmission and processing.The system software architecture is designed and developed.Tests show that the system realizes 96channel 10 Gbps highspeed data signal reception, 56-channel 10 Gbps highspeed data signal transmission, 12-channel 10 Gbps highspeed data optical signal transmission in the 6U size, and 32-channel 10 Gbps highspeed data signal interconnection in the board.The system’s 10 Gbps multichannel data transmission paths can meet the requirements of militarygrade harsh environment applications, and its multichannel 10 Gbps data transmission capability is at the domestic leading and international advanced level in the domestic military module circuit.

    参考文献
    相似文献
    引证文献
引用本文

郭静. FPGA+SRIO+VPX架构的多路高速互连信息处理系统实现[J].重庆工商大学学报(自然科学版),2020,37(4):46-51
GUO Jing. Implementation of Multichannel Highspeed Interconnect Information Processing System Based on FPGA+SRIO+VPX Architecture[J]. Journal of Chongqing Technology and Business University(Natural Science Edition),2020,37(4):46-51

复制
分享
文章指标
  • 点击次数:
  • 下载次数:
历史
  • 收稿日期:
  • 最后修改日期:
  • 录用日期:
  • 在线发布日期: 2020-07-14
×
2024年《重庆工商大学学报(自然科学版)》影响因子显著提升