In the field of complex embedded computing, the speed and scale requirements of multichannel data transmission are getting higher and higher. The overall principle design of a multichannel highspeed interconnect information processing system is presented. The core components of the system are three FPGAs, one PPC and one SRIO. In order to realize multichannel 10Gb highspeed signal communication inside and between boards, the system uses a large number of highspeed transceivers of highperformance FPGAs to carry out reasonable functional design, GTH clock design and hostside loading design. The FPGA GTH test inside and between the boards shows that the system can achieve the receiving of 96channel 10G highspeed data signals from other boards, send 56channel 10G highspeed data signals and 12channel 10G highspeed optical signal data, and interconnect 32channel 10G highspeed data signals in the board. This system has the characteristics of high integration, high bandwidth and high speed. After experimental tests, its performance is stable and it has good practical results.