郭静.多路高速互连信息处理系统及其FPGA实现[J].重庆工商大学学报(自然科学版),2020,37(6):19-25
GUO Jing.Multi channel High speed Interconnect Information Processing System and FPGA Implementation[J].Journal of Chongqing Technology and Business University(Natural Science Edition),2020,37(6):19-25
多路高速互连信息处理系统及其FPGA实现
Multi channel High speed Interconnect Information Processing System and FPGA Implementation
  
DOI:
中文关键词:  多路  高速互连  FPGA  GHT
英文关键词:multi-channel  high-speed interconnect  FPGA  GHT
基金项目:
作者单位
郭静 1.重庆工商大学 人工智能学院重庆 4000672.检测控制集成系统重庆市工程实验室重庆 400067 
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中文摘要:
      针对复杂嵌入式计算领域对多通道数据传输的速率和规模需求越来越高,给出了一款基于VPX的多路高速互连信息处理系统的整体原理设计;该系统的核心组件有3片FPGA、1片PPC和1片SRIO,为了实现板内外多路10 Gbps高速信号通信,利用高性能FPGA的大量高速收发器,进行了合理的功能设计、GTH时钟设计和主机端加载设计;最后FPGA板内板间GTH测试表明,该系统很好地实现了板间96路10 Gbps高速数据信号接收、56路10 Gbps高速数据信号发送、12路10 Gbps高速数据光信号发送、板内32路10 Gbps高速数据信号互连;该系统具有高集成度、高带宽、高速率等特点,经实验测试,其性能稳定,具有良好的实践效果。
英文摘要:
      In the field of complex embedded computing, the speed and scale requirements of multi channel data transmission are getting higher and higher. The overall principle design of a multi channel high speed interconnect information processing system is presented. The core components of the system are three FPGAs, one PPC and one SRIO. In order to realize multi channel 10Gb high speed signal communication inside and between boards, the system uses a large number of high speed transceivers of high performance FPGAs to carry out reasonable functional design, GTH clock design and host side loading design. The FPGA GTH test inside and between the boards shows that the system can achieve the receiving of 96 channel 10G high speed data signals from other boards, send 56 channel 10G high speed data signals and 12 channel 10G high speed optical signal data, and interconnect 32 channel 10G high speed data signals in the board. This system has the characteristics of high integration, high bandwidth and high speed. After experimental tests, its performance is stable and it has good practical results.
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