| 摘要: |
| 阐述了A律13折线非线性量化编/解码算法原理，利用Verilog HDL语言在QuartusII软件平台上给出顶层原理图、仿真结果和编/解码部分的关键代码，编/解码器通过现场可编程门阵列(FPGA)下载验证，实现了语音信号的实时传输；实现的过程中利用逐次比较型算法的特点进行了更好的优化和简化，使应用具有更好的可靠性和实时性。 |
| 关键词: A律 FPGA 编码 解码 |
| DOI： |
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| FPGA Implementation of A law Speech Compression Encoder and Decoder |
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JIA Rui lian, XIAO Sha li, GUO Cheng, LIU Feng
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| Abstract: |
| This paper expounds the principle of the A law 13 segment nonlinear quantization encoding/decoding algorithm.The top floor principle diagram,simulation result and the key code of encoding/decoding part are given by using Verilog HDL language on QuartusII software platform,and the encoder/decoder can be downloaded and tested via field programmable gate array(FPGA)so that real time speech signal transmission is implemented.The implementing process is better optimized and simplified based on the characteristics of successive approximation type algorithm so that its application has better reliability and timeliness. |
| Key words: A law FPGA encode decode |
